A Multiplier Unit is used in binary multiplication.
It takes two inputs:

• A: A complete 4-bit number
• B: A single bit (specific digit from another number)

The Multiplier Unit multiplies the bit B with the entire number A.
This is commonly used in partial product generation for binary multiplication.

Block Diagram

Verilog Implementation

module MultiplierUnit(A, B, MUout);
    input [3:0] A;   // 4-bit input A
    input B;         // Single-bit input B
    output [3:0] MUout;

    // Multiply A with B by ANDing A with B replicated 4 times
    assign MUout = A & {4{B}};

endmodule