USB 2.0 host controller implementations typically include a companion controller architecture to support devices operating at different speeds.
Companion Controller Architecture
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A typical USB 2.0 host controller configuration includes:
- One EHCI controller
- Handles all high-speed devices
- One or more UHCI or OHCI controllers
- Handle low-speed and full-speed devices
- One EHCI controller
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The exact implementation varies depending on the number of USB root ports required by the platform.
The xHCI controller introduced with USB 3.0 eliminates the need for companion controllers entirely — see USB 3.0 Host Controllers.
Example: Eight-Port Companion Controller
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EHCI
- Implements eight ports
- Supports up to eight high-speed devices
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UHCI Companion Controllers
- Four UHCI controllers
- Each provides two ports
- Enables all eight root ports to support low- or full-speed devices
Port Routing Logic
- Port routing is managed by EHCI software.
- For each root port, the software determines whether the attached device is:
- High-speed
- Full-speed
- Low-speed
Routing Behavior
| Device Speed | Routed To |
|---|---|
| High-speed | Remains on the EHCI controller |
| Full-speed | Routed to the appropriate UHCI/OHCI companion |
| Low-speed | Routed to the appropriate UHCI/OHCI companion |
Routing Process
- A device is attached to a root port
- EHCI detects the connection and performs a port reset
- During reset, the device's speed is determined via electrical signaling:
- High-speed devices complete the high-speed handshake (chirp protocol)
- Full/low-speed devices do not respond to the chirp
- If the device is not high-speed, EHCI releases the port ownership to the companion controller
- The companion controller then manages the port and communicates with the device
Port routing is transparent to the USB device — the device is unaware of which controller is managing it.
Why Companion Controllers Exist
The EHCI specification was designed to only handle high-speed transactions natively. LS/FS transactions have different timing and signaling requirements that EHCI hardware does not directly support at the root port level.
This is in contrast to how EHCI handles LS/FS devices behind downstream high-speed hubs, where the hub's Transaction Translator bridges the speed gap.