A major objective of the USB 3.0 specification is to reduce power consumption across all platform implementations. To achieve this, USB 3.0 introduces several architectural and protocol-level improvements.
Effective power savings, however, still depend heavily on the capabilities of the USB 3.0 host controller (see USB 3.0 Host Controllers).


SuperSpeed Bus Power Management

SuperSpeed power management focuses on:

These mechanisms significantly lower power usage when devices or links are idle.


Broadcast vs. Unicast Bus

USB 2.0 (Broadcast Bus)

SuperSpeed (Unicast Bus)


USB distributes 5 V power to all connected devices:

Basic Power Control

SuperSpeed adds finer-grained link power states:

State Description Recovery Speed Notes
U0 Fully powered and operational Active state; packets flow normally
U1 Standby; electrical idle Fast (~microseconds) Quick transitions for short idle periods
U2 Standby; electrical idle Slow (~milliseconds) Deeper savings; PLL may be powered down
U3 Suspend; electrical idle Very slow (~ms to tens of ms) All functions suspended; bus current ≤ 2.5 mA

State Transition Diagram

U0 (Active) ←→ U1 (Standby Fast) ←→ U2 (Standby Slow)
     ↕
U3 (Suspend)

State Control

Inactivity Timers


Function Power Management

Function Suspend Mechanism

  1. Host sends a SET_FEATURE(FUNCTION_SUSPEND) request targeting a specific interface
  2. The function enters a low-power state
  3. Other functions in the same device continue operating normally
  4. The function can optionally enable function remote wakeup
Note

Function-level suspend is particularly useful for composite devices — e.g., a USB headset can suspend its microphone interface while the speaker interface remains active.


System Power Improvements

USB 2.0 Limitation

USB 3.0 Improvement (xHCI)

Platform-Level Impact

Component USB 2.0 (EHCI) USB 3.0 (xHCI)
Host controller Active (polling memory) Idle until doorbell ring
Main memory Active (being polled) Idle until needed
CPU Interrupted by polling overhead Sleeps until event ring interrupt
Chipset/PCH Active links Links can enter low power